1. Field of the Invention
This invention relates to a protection circuit for disabling a bus driver circuit upon the detection of a destructively high current in its output for a predetermined time.
2. Description of the Problem to be Solved
In certain circuit designs a plurality of driver outputs are directly coupled to a common bus, which may be a data bus, an address line, or the like. The output stage of each driver may comprise a complementary pair of field effect transistors, and the many drivers are synchronously controlled such that only one driver is operatively enabled at a given time. The separate drivers may be physically located on a number of different chips. The general arrangement may easily be understood from the simplified circuit diagram shown in FIG. 1.
In the event of a malfunction in the control circuitry whereby two or more of the driver Enable lines are simultaneously raised, a situation could easily obtain where one driver is pulling up while another driver is pulling down. In other words, the upper or positive FET in Driver 1 could be conducting at the same time as the lower or negative FET in Driver 2. This would not only render the output indeterminate since the bus loading capacity would be neither charged nor discharged, but would create a direct, d.c. short from the source voltage to ground through the two conducting FET's and the common bus. The attendant high current could easily destroy the driver chips, and would certainly impact the reliability of the metal powering lines on these chips.
To combat this potential problem at the system level by providing circuitry to ensure that only one driver is enabled at a given time is both difficult and impractical, particularly in view of the requirements that would be imposed on such circuitry during start-up and testing.